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M88DDR4DB02 - Gen2 DDR4 Data Buffer (DB)

M88DDR4DB02 is a dual 4-bit bidirectional Data Buffer (DB) with differential strobes. The chip is compliant with JEDEC DDR4DB02 specification and works together with DDR4 Registering Clock Driver (RCD) for LRDIMM applications. An LRDIMM uses nine DBs in conjunction with one RCD to provide advanced memory solutions with high capacity, high speed and low power for the high-end server platforms.


FeatureApplication

Compliant with JEDEC DDR4DB02 standard

Bidirectional retiming and 1:1 redriving of DDR4 data (DQ) signals

Regeneration of data strobe (DQS) signals from input clock

FIFOs on the DQ path for decoupling Host and DRAM interface time domains

Up to four package ranks supported

Package rank timing alignment supported on the Host interface

x4 DRAM devices supported

VDD voltage support: 1.2V

Parity error checking and sequence error checking on the BCOM interface

Different power saving modes such as CKE low power mode, CK stop mode, etc

Green package: Fine-pitch Ball Grid Array (FBGA)

High-performance DDR4 LRDIMM

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